There are numerous individual operations, or processing steps, performed, in a strictly followed sequence, on the silicon wafer in the course of manufacturing a complex integrated circuit (IC). Each such operation must be precisely controlled in order to assure that the entire fabrication process yields integrated circuits displaying the required electrical characteristics.
Frequently, failure of an individual operation is detected only after the completion of the entire, very expensive, process of IC fabrication. Due to the very high cost of advanced IC fabrication processes, such failures result in the severe financial losses to the integrated circuit manufacturer. Therefore, detection of errors in the manufacturing process, immediately after their occurrence, could prevent the unnecessary continuation of the fabrication of devices which are destined to malfunction, and hence, could substantially reduce the financial losses resulting from such errors.
Process monitoring in semiconductor device manufacturing relies upon the examination of the changes which accruing certain physical or chemical properties of the silicon wafer upon which the semiconductor devices are fabricated. These changes may occur following the various processing steps to which the silicon wafer is subjected and are reflected by changes in the electrical properties of the wafer. Therefore, by monitoring selected electrical properties of the silicon wafer in the course of IC fabrication, an effective control over the manufacturing process can be accomplished.
Not all of the electrical characteristics of a completed integrated circuit can be predicted based on the measurements performed on a partially processed wafer. Most of the characteristics however, can be predicted directly or indirectly based on the investigation of the condition of the surface of the silicon wafer (substrate) in the course of IC manufacture. The condition of the silicon surface is very sensitive to the outcome of the individual processing steps, which are applied during IC manufacturing, and hence, the measurement of the electrical properties of the substrate surface can be an effective tool by which the monitoring of the outcome of the individual processing steps can be accomplished.
For metal-oxide-semiconductor (MOS) transistor, generally used in integrated circuits, the doping concentration of each doping region, such as source/drain region, directly effects the electrically characteristics of the transistor, so the doping concentration must be monitored after each processing step to predict the electrical properties of the transistor. However, the depth of the doping region trends to be shallow for gradually growing of the fabricating density of the IC manufactures, and hence, the energy of ion implanting for fabricating the doping regions is getting lower and results in difficulty to detect the doping concentration.
There are two methods for measuring the doping concentration in the prior art, secondary ion mass spectroscopy (SIMS) and spreading resistance profile (SRP). But, both methods are destructive measurement and required more times to prepare the test sample. It is hard to make sense when we want to monitor the production daily.